VHDL Development of a Discrete Wavelet Transformation

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Zaidi Razak
Mashkuri Hj. Yaacob

Abstract

This paper describes the development process of a discrete wavelet transformation (DWT) chip design. It comprises three phases i.e. simulation by MATLABTM, simulation by SYNOPSYSTM and the final circuit synthesis using SYNOPSYSTM synthesis tools. It also explains the existence of an entity that will ensure accurate data to be processed.

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How to Cite
Razak, Z., & Hj. Yaacob, M. (2002). VHDL Development of a Discrete Wavelet Transformation. Malaysian Journal of Computer Science, 15(1), 84–92. Retrieved from https://jml.um.edu.my/index.php/MJCS/article/view/6048
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